module top_stop_watch(
    input           clk,
    input           rst_n,
    input           clear,
    input           start_stop, //has been posedge 
    output  [3:0]   hr_h,
    output  [3:0]   hr_l,
    output  [3:0]   min_h,
    output  [3:0]   min_l,
    output  [3:0]   sec_h,
    output  [3:0]   sec_l
);
localparam DIV_DEGREE = 16'd10_000_000;

wire start_stop_pos;
reg  start_stop_en;

always @(posedge clk or negedge rst_n) begin : proc_
    if(~rst_n) begin
        start_stop_en <= 0;
    end else if (start_stop_pos) begin
        start_stop_en <= ~start_stop_en;
    end
end
stop_watch 
    #(.DIV_DEGREE(DIV_DEGREE))
    inst_stop_watch
    (
        .clk        (clk),
        .rst_n      (rst_n),
        .clear      (clear),
        .start_stop (start_stop_en),
        .hr_h       (hr_h),
        .hr_l       (hr_l),
        .min_h      (min_h),
        .min_l      (min_l),
        .sec_h      (sec_h),
        .sec_l      (sec_l)
    );

Edge_Detect inst_Edge_Detect 
    (
        .clk(clk), 
        .rst_n(rst_n), 
        .In(start_stop), 
        .P_Pluse(start_stop_pos)
    );

endmodule